In the art relating to portable computation and communication devices, for example “smart phones,” power consumption is an ever-present concern. At the same time there is an equally present demand for higher computational power and increased storage, both of which are directly counter to the concern for lower power consumption.
One known technique for reducing power consumption is configuring circuitry to have a power-down or sleep mode, collectively referenced in this disclosure as “sleep mode.” There is no uniform specification as to the actions performed in entering the sleep mode or awakening back to an operational state. In general, though, entering sleep mode involves detecting a period of inactivity, e.g., detecting no input from a user of a hand-held multimedia device while in an operational state, such as watching a video, in which no user input is expected and, in response, disabling certain clocks and lowering voltages on some internal power supply rails. The disabling of the clocks reduces switching power, and lowering the voltages reduces leakage currents.
However, circuits entering the sleep mode include register files and regions of static random access memory (“SRAM”), both of these being addressable flip-flops, storing machine states, e.g., states in the processing of an application. These flip-flops are volatile memory, meaning that power is required to maintain state. Some of the machine states, though, if lost upon entering the sleep mode, can require the awakening process to include an entire re-boot of the system. As can be appreciated, such a requirement could defeat the purposes of having the sleep mode.
One known method to store the machine state as it existed at the time of entering the sleep mode is to copy the content of the relevant flip-flops to a non-volatile storage, prior to disabling the clocks and lowering the power supply voltages. There is a range of known non-volatile memory techniques for this purpose. Among these known non-volatile memory techniques is magnetic tunnel junction (“MTJ”) storage.
Known MTJ techniques for storing flip-flop state, however, employ circuitry merged with that of the flip-flop. As has been long known this merging of circuitry imposes costs, such as increased propagation delay and difficulty in optimizing both latch performance and sensing current.